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2.9 RX IQ loop back self test (ST_CDSP_RX_IQ_LOOP_BACK_TEST)
RX_IQ_LOOPBACK (81) tests that the RXI lines & VREFCM line between RAP & HINKU are connected.
Tested signals: VBAT_ASIC, RXQP, RXQN, RXIP, RXIN, VREFCM, TXIP, TXIN, RFBUS
Error code for this self test is given in format:
0xyy, 0xzz, MeasResult1, MeasResult2
•
,where 0xyy, 0xzz part is the main part of the error code:
A
re RX
Are RXIQ signals OK?
VREFCM OK?
VREFCM OK?
Propable cause:
Propable cause:
Poor solder/Faulty RAP
Poor solder/Faulty RAP
A-20
Measured IQ power
Measured IQ power
under limit
under limit
(0x0010)
(0x0010)
IQ signals OK?
Poor solder/Faulty Hinku
NO
NO
Poor solder/Faulty Hinku
Other possible reasons:
Other possible reasons:
Vinku, but it should have
Vinku, but it should have
failed already in earlier
failed already in earlier
YES
YES
NO
NO
YES
YES
Retu/VB_ext line, but these should
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ST_CDSP_RX_IQ_LOOP_BACK_TEST
ST_CDSP_RX_IQ_LOOP_BACK_TEST
NO
NO
Any other code
Any other code
YES
YES
Propable cause:
Propable cause:
tests
Propable cause:
Propable cause:
Poor solder/Faulty Hinku
Poor solder/Faulty Hinku
Other possible reasons:
Other possible reasons:
Retu/VB_ext line, but these
should have failed already in
have failed already
in earlier tests
earlier tests.
Company Confidential
Appendix A: RF Troubleshooting
0xyyzz
It's not possible to get
It's not possible to
NO
NO
get here ...
YES
YES
Propable cause:
Propable cause:
Test problem
Test problem
RFBUS failure (but this
RFBUS failure (but this should
should be ok if we've
be ok if we've gotten this
gotten this far)
here...
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