Fujitsu MHA2032AT IDE Hard Drive Manuals

Manuals and User Guides for Fujitsu MHA2032AT IDE Hard Drive. We have 1 Fujitsu MHA2032AT IDE Hard Drive manual available for free PDF download: Product Manual

Fujitsu MHA2032AT Product Manual

Fujitsu MHA2032AT Product Manual (177 pages)

Brand: Fujitsu | Category: Storage | Size: 1.62 MB

Table of Contents

Revision History
3
Operating Environment
5
Important Alert Items
7
Table of Contents
8
CHAPTER 1 Device Overview

15
- Adaptability
  16
- Features
  16
- Functions and Performance
  16
- Interface
  16
- Device Specifications
  18
- Specifications Summary
  18
- Table 1.1 Specifications
  18
- Model and Product Number
  19
- Power Requirements
  19
- Table 1.2 Model Names and Product Numbers
  19
- Figure 1.1 Current Fluctuation (Typ.) at +5V When Power Is Turned on
  20
- Table 1.3 Current and Power Dissipation
  20
- Acoustic Noise
  21
- Environmental Specifications
  21
- Table 1.4 Environmental Specifications
  21
- Table 1.5 Acoustic Noise Specification
  21
- Reliability
  22
- Shock and Vibration
  22
- Table 1.6 Shock and Vibration Specification
  22
- Error Rate
  23
- Media Defects
  23
CHAPTER 2 Device Configuration

24
- Device Configuration
  25
- Figure 2.1 Disk Drive Outerview
  25
- Figure 2.2 Configuration of Disk Media Heads
  26
- ATA Interface
  27
- Drive Connection
  27
- Figure 2.3 1 Drive System Configuration
  27
- System Configuration
  27
- Drives Connection
  28
- Figure 2.4 2 Drives Configuration
  28
CHAPTER 3 Installation Conditions

29
CHAPTER 4 Theory of Device Operation

41
- Outline
  42
- Subassemblies
  42
- Disk
  42
- Head
  42
- Spindle
  43
- Actuator
  43
- Air Filter
  43
- Figure 4.1 Head Structure
  43
- Circuit Configuration
  44
- Figure 4.2 Circuit Configuration
  45
- Power-On Sequence
  46
- Self-Calibration
  47
- Self-Calibration Contents
  47
- Figure 4.3 Power-On Operation Sequence
  47
- Execution Timing of Self-Calibration
  48
- Command Processing During Self-Calibration
  49
- Read/Write Circuit
  49
- Read/Write Preamplifier (Preamp)
  49
- Table 4.1 Self-Calibration Execution Timechart
  49
- Write Circuit
  50
- Table 4.2 Write Precompensation Algorithm
  50
- Figure 4.4 Read/Write Circuit Block Diagram
  51
- Read Circuit
  52
- Figure 4.5 Frequency Characteristic of Programmable Filter
  52
- Time Base Generator Circuit
  53
- Table 4.3 Write Clock Freqeuncy and Recording Density (BPI) of each Zone
  53
- Servo Control
  54
- Servo Control Circuit
  54
- Figure 4.6 Block Diagram of Servo Control Circuit
  54
- Figure 4.7 Physical Sector Servo Configuration on Disk Surface
  56
- Data-Surface Servo Format
  58
- Servo Frame Format
  58
- Figure 4.8 Servo Frame Format
  58
- Actuator Motor Control
  59
- Spindle Motor Control
  60
CHAPTER 5 Interface

62
- Physical Interface
  63
- Interface Signals
  63
- Signal Assignment on the Connector
  63
- Figure 5.1 Interface Signals
  63
- Table 5.1 Signal Assignment on the Interface Connector
  64
- Logical Interface
  67
- I/O Registers
  67
- Table 5.2 I/O Registers
  68
- Command Block Registers
  69
- Control Block Registers
  74
- Host Commands
  74
- Table 5.3 Command Code and Parameters
  75
- Command Descriptions
  77
- Figure 5.2 Execution Example of READ MULTIPLE Command
  81
- Table 5.4 Information to be Read by IDENTIFY DEVICE Command
  93
- Table 5.5 Features Register Values and Settable Modes
  99
- Table 5.6 Diagnostic Code
  104
- Table 5.7 Features Register Values (Subcommands) and Functions
  115
- Table 5.8 Format of Device Attribute Value Data
  117
- Table 5.9 Format of Insurance Failure Threshold Value Data
  118
- Error Posting
  128
- Command Protocol
  130
- Data Transferring Commands from Device to Host
  130
- Figure 5.3 Read Sector(S) Command Protocol
  131
- Data Transferring Commands from Host to Device
  132
- Figure 5.4 Protocol for Command Abort
  132
- Commands Without Data Transfer
  134
- Other Commands
  135
- DMA Data Transfer Commands
  135
- Timing
  137
- PIO Data Transfer
  137
- Single Word DMA Data Transfer
  139
- Multiword DMA Data Transfer
  140
- Power-On and Reset
  140
  - Device Response to the Reset
    143
CHAPTER 6 Operations

143
- Response to Power-On
  143
  - Address Translation
    148
- Default Parameters
  148
- Logical Address
  148
  - Power Save
    150
- Power Save Mode
  150
- Power Commands
  150
  - Defect Management
    152
- Spare Area
  153
- Alternating Defective Sectors
  153
  - Read-Ahead Cache
    155
- Caching Operation
  155
- Usage of Read Segment
  157
- Write Cache
  163
Acronyms and Abbreviations

168

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