Related Manuals for Asus AAEON BOXER-6710
Summary of Contents for Asus AAEON BOXER-6710
- Page 1 BOXER-6710 Fanless Embedded Box PC User’s Manual 2 Last Updated: January 24, 2019...
- Page 2 Copyright Notice This document is copyrighted, 2019. All rights are reserved. The original manufacturer reserves the right to make improvements to the products described in this manual at any time without notice. No part of this manual may be reproduced, copied, translated, or transmitted in any form or by any means without the prior written permission of the original manufacturer.
- Page 3 Acknowledgement All other products’ name or trademarks are properties of their respective owners. Microsoft Windows is a registered trademark of Microsoft Corp. Intel, Pentium, Celeron, and Xeon are registered trademarks of Intel Corporation Atom is a trademark of Intel Corporation ...
- Page 4 Packing List Before setting up your product, please make sure the following items have been shipped: Item Quantity BOXER-6710 3 Pin DC-In Power Connector Din Rail bracket Product DVD Screw Pack If any of these items are missing or damaged, please contact your distributor or sales representative immediately.
- Page 5 About this Document This User’s Manual contains all the essential information, such as detailed descriptions and explanations on the product’s hardware and software features (if any), its specifications, dimensions, jumper/connector settings/definitions, and driver installation instructions (if any), to facilitate users in setting up their product. Users may refer to the AAEON.com for the latest version of this document.
- Page 6 Safety Precautions Please read the following safety instructions carefully. It is advised that you keep this manual for future references All cautions and warnings on the device should be noted. All cables and adapters supplied by AAEON are certified and in accordance with the material safety laws and regulations of the country of sale.
- Page 7 As most electronic components are sensitive to static electrical charge, be sure to ground yourself to prevent static charge when installing the internal components. Use a grounding wrist strap and contain all electronic components in any static-shielded containers. If any of the following situations arises, please the contact our service personnel: Damaged power cord or plug Liquid intrusion to the device iii.
- Page 8 FCC Statement This device complies with Part 15 FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received including interference that may cause undesired operation.
- Page 9 China RoHS Requirements (CN) 产品中有毒有害物质或元素名称及含量 AAEON Embedded Box PC/ Industrial System 有毒有害物质或元素 部件名称 铅 汞 镉 六价铬 多溴联苯 多溴二苯醚 (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) 印刷电路板 ○ ○ ○ ○ ○ ○ 及其电子组件 外部信号 ○ ○ ○ ○ ○ ○ 连接器及线材...
- Page 10 China RoHS Requirement (EN) Poisonous or Hazardous Substances or Elements in Products AAEON Embedded Box PC/ Industrial System Poisonous or Hazardous Substances or Elements Hexavalent Polybrominated Polybrominated Component Lead Mercury Cadmium Chromium Biphenyls Diphenyl Ethers (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) PCB &...
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Page 11: Table Of Contents
Table of Contents Chapter 1 - Product Specifications ..................1 Specifications ........................2 Chapter 2 – Hardware Information ..................4 Dimensions ........................5 Jumpers and connectors ..................... 6 List of Jumpers ........................ 7 2.3.1 Setting Jumpers ..................7 2.3.2 Auto Power Button (JP5) ..............8 2.3.3 Clear CMOS (JP10) ................ - Page 12 Chapter 3 - AMI BIOS Setup ....................22 System Test and Initialization..................23 AMI BIOS Setup ......................24 Setup Submenu: Main ....................25 Setup Submenu: Advanced ..................26 3.4.1 Advanced: Trusted Computing ............27 3.4.2 Advanced: CPU Configuration............29 3.4.3 Advanced: SATA Drives ..............
- Page 13 IRQ Mapping Chart ..................... 58 Preface XIII...
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Page 14: Chapter 1 - Product Specifications
Chapter 1 Chapter 1 - Product Specifications... -
Page 15: Specifications
Specifications System Intel® Pentium® processor N4200 Intel® Celeron® processor N3350 Intel® System on Chip Chipset DDR3L 1866 SODIMM slot x 1, up to 8GB System Memory HDMI, VGA Display Interface HDD/SSD, optional mSATA Storage Device Intel® i211-AT x 1 Intel® i219-LM x 1 Network VGA x 1 HDMI x 1... - Page 16 Mechanical DIN Rail Mount Mounting 44mm(W) x 166mm(H) x 106mm(D) Dimensions (W x H x D) 3.08lb (1.4kg) Gross Weight 1.32lb (0.6kg) Net Weight Environmental -30°C ~ 60°C with W.T. SSD/HDD/mSATA Operating Temperature (according to IEC68-2-14 with 0.5 m/s AirFlow ; with industrial devices) -49°F ~ 176°F (-45°C ~ 80°C) Storage Temperature...
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Page 17: Chapter 2 - Hardware Information
Chapter 2 Chapter 2 – Hardware Information... -
Page 18: Dimensions
Dimensions 1 0 6 , 6 Chapter 2 – Hardware Information... -
Page 19: Jumpers And Connectors
Jumpers and connectors Chapter 2 – Hardware Information... -
Page 20: List Of Jumpers
List of Jumpers Please refer to the table below for all of the system’s jumpers that you can configure for your application Label Function AT/ATX mode select JP10 Clear CMOS 2.3.1 Setting Jumpers You configure your card to match the needs of your application by setting jumpers. A jumper is the simplest kind of electric switch. -
Page 21: Auto Power Button (Jp5)
2.3.2 Auto Power Button (JP5) 1 2 3 1 2 3 Disable Enable (Default) Function ATX (Default)- 2.3.3 Clear CMOS (JP10) 1 2 3 JP10 Function Normal (Default) Clear CMOS Chapter 2 – Hardware Information... -
Page 22: List Of Connectors
List of Connectors Please refer to the table below for all of the system’s connectors that you can configure for your application Label Function CN65 CRT port (BOX connector) CN38 DC-IN CN61 HDMI connector SPI ROM connector CN26 Dual stack USB (3.0/2.0) CN27 Dual stack USB (3.0/2.0) Audio Jack Connector (BOX connector) - Page 23 SIM1 SIM1 card connector CN39 SATA LED connector DIMM1 SO DIMM connector Chapter 2 – Hardware Information...
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Page 24: Mini Card Connector (Cn33, Cn5)
2.4.1 Mini Card Connector (CN33, CN5) Signal Signal PCIE_WAKE# +V3.3A +1.5V PCIE_CLK_REQ# UIM_PWR UIM_DATA PCIE_REF_CLK- UIM_CLK PCIE_REF_CLK+ UIM_RST UIM_VPP W_DISABLE# PCIE_RST# PCIE_RX- +V3.3A PCIE_RX+ +1.5V SMB_CLK PCIE_TX- SMB_DATA PCIE_TX+ USB_D- USB_D+ +V3.3A +V3.3A +1.5V Chapter 2 – Hardware Information... -
Page 25: Lpc Port (Cn45)
+V3.3A 2.4.2 LPC Port (CN45) Pin Name Signal Type Signal Level LAD0 +3.3V LAD1 +3.3V LAD2 +3.3V LAD3 +3.3V +3.3V +3.3V LFRAME# LRESET# +3.3V LCLK I2C CLK +3.3V I2C DATA +3.3V SERIRQ +3.3V Chapter 2 – Hardware Information... -
Page 26: Sata Port (Cn4)
2.4.3 SATA Port (CN4) Pin Name Signal Type Signal Level GND # SATA_TX+ DIFF SATA_TX- DIFF SATA_RX- DIFF SATA_RX+ DIFF 2.4.4 SATA PWR Port (CN3) Pin Name Level +12V Chapter 2 – Hardware Information... -
Page 27: Usb 3.0 (Cn26, Cn27)
2.4.5 USB 3.0 (CN26, CN27) Signal Signal VBUS_1 VBUS_2 (A)D- (B)D- (A)D+ (B)D+ (A)SSRX- (B)SSRX- (A)SSRX+ (B)SSRX+ (A)SSTX- (B)SSTX- (A)SSTX+ (B)SSTX+ Chapter 2 – Hardware Information... -
Page 28: Vga Port Box Connector (Cn65)
2.4.7 VGA port BOX connector (CN65) Signal Signal VSYNC HSYNC DDC_CLK DDC_DATA Blue Green VGA_VCC 2.4.8 DC-IN (CN38) Signal Signal PWR_IN 2.4.9 HDMI Port (CN61) Signal Signal HDMI_DATA2_P HDMI_DATA2_N HDMI_DATA1_P HDMI_DATA1_N HDMI_DATA0_P HDMI_DATA0_N HDMI_CLK_P HDMI_CLK_N Chapter 2 – Hardware Information... -
Page 29: Spi Rom Connector For Debugging (Cn8)
HDMI_SCL HDMI_SDA HDMI_PWR HDMI_HDP 2.4.10 SPI ROM connector for debugging (CN8) Signal Signal SPI_VCC SPI_CE SPI_CLK SPI_DATA_OUT SPI_DATA_IN 2.4.11 Remote switch connector (CN63) Signal Signal PANSWH# Chapter 2 – Hardware Information... -
Page 30: Usb2.0 Connector (Internal Box Connector) (Cn53, Cn54)
2.4.12 USB2.0 connector (internal BOX connector) (CN53, CN54) Signal Signal VBUS USB1- USB+ 2.4.13 Power Switch connector (internal BOX connector) (CN36) Signal Signal PANSWH# GND- 2.4.15 COM port RS-232/422/485 BOX connector (CN18/CN9/CN12/CN14) RS-232 RS-422 RS-485 DATA- DATA+ Chapter 2 – Hardware Information... - Page 31 Chapter 2 – Hardware Information...
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Page 32: Hdd & Ram Installation
HDD & RAM Installation Remove the screws as shown below; then remove the cover. Chapter 2 – Hardware Information... - Page 33 Put the thermal pad on between the chassis and the RAM, slot in the RAM diagonally into the slot and push down to secure. * 6 M3 SCREW PAD 2 0 * 1 0 * 0 . 7 * 2 M3 SCREW PAD 6 6 * 2 0 * 4 RAM HEATSINK Chapter 2 –...
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Page 34: Din Rail Installation
Din Rail Installation Chapter 2 – Hardware Information... -
Page 35: Chapter 3 - Ami Bios Setup
Chapter 3 Chapter 3 - AMI BIOS Setup... -
Page 36: System Test And Initialization
System Test and Initialization The system uses certain routines to perform testing and initialization. If an error, fatal or non-fatal, is encountered, a few short beeps or an error message will be outputted. The board can usually continue the boot up sequence with non-fatal errors. The system configuration verification routines check the current system configuration against the values stored in the CMOS memory. -
Page 37: Ami Bios Setup
AMI BIOS Setup The AMI BIOS ROM has a pre-installed Setup program that allows users to modify basic system configurations, which is stored in the battery-backed CMOS RAM and BIOS NVRAM so that the information is retained when the power is turned off. To enter BIOS Setup, press <Del>... -
Page 38: Setup Submenu: Main
Setup Submenu: Main Chapter 3 – AMI BIOS Setup... -
Page 39: Setup Submenu: Advanced
Setup Submenu: Advanced Chapter 3 – AMI BIOS Setup... -
Page 40: Advanced: Trusted Computing
3.4.1 Advanced: Trusted Computing Options summary: Security Device Disabled Optimal Default, Failsafe Default Support Enabled Enable/Disable Security Device. NOTE: Your Computer will reboot during restart in order to change State of the Device. SHA-1 PCR Bank Disabled Enabled Optimal Default, Failsafe Default Enable or Disable SHA-1 PCR Bank SHA256 PCR Bank Disabled... - Page 41 Storage Hierarchy Disabled Enabled Optimal Default, Failsafe Default Enable or Disable Storage Hierarchy Endorsement Disabled Hierarchy Enabled Optimal Default, Failsafe Default Enable or Disable Endorsement Hierarchy TPM2.0 UEFI Spec TCG_2 Optimal Default, Failsafe Default Version TCG_1_2 Select the TCG2 Spec Version Support, TCG_1_2: the Compatible mode for Win8/Win10, TCG_2: Support new TCG2 protocol and event format for Win10 or later Physical presence...
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Page 42: Advanced: Cpu Configuration
3.4.2 Advanced: CPU Configuration Chapter 3 – AMI BIOS Setup... - Page 43 Options summary: Active Processor Disabled Optimal Default, Failsafe Default Cores Enabled Number of cores to enable in each processor package Intel Virtualization Disabled Technology Enabled Optimal Default, Failsafe Default When enabled, a VMM can utilize the additional hardware capabilities provided by Vanderpool Technology.
- Page 44 Power Limit 1 Enable Disabled Optimal Default, Failsafe Default Enabled Enable/Disable Power Limit 1 C-States Disabled Optimal Default, Failsafe Default Enabled Enable/Disable C States Chapter 3 – AMI BIOS Setup...
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Page 45: Advanced: Sata Drives
3.4.3 Advanced: SATA Drives Options summary: Chipset SATA Enable Optimal Default, Failsafe Default Disable Enable or Disable the Chipset SATA Controller. The Chipset SATA controller supports the 2 black internal SATA ports (up to 3Gb/s supported per port) Port Enable Optimal Default, Failsafe Default Disable Enable or Disable SATA Port... -
Page 46: Advanced: Hardware Monitor
3.4.4 Advanced: Hardware Monitor Chapter 3 – AMI BIOS Setup... -
Page 47: Advanced: Sio Configuration
3.4.5 Advanced: SIO Configuration Chapter 3 – AMI BIOS Setup... -
Page 48: Sio Configuration: Serial Port 1 Configuration
3.4.5.1 SIO Configuration: Serial Port 1 Configuration Options summary: Use This Device Disabled Enabled Optimal Default, Failsafe Default Enable or Disable this Logical Device. Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=3F8; IRQ=4; IO=2F8; IRQ=3; Allows the user to change the device resource settings. New settings will be reflected on this setup page after system restarts. -
Page 49: Sio Configuration: Serial Port 2 Configuration
3.4.5.2 SIO Configuration: Serial Port 2 Configuration Options summary: Use This Device Disabled Enabled Optimal Default, Failsafe Default Enable or Disable this Logical Device. Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=2F8; IRQ=3; IO=3F8; IRQ=4; Allows the user to change the device resource settings. New settings will be reflected on this setup page after system restarts. -
Page 50: Sio Configuration: Serial Port 3 Configuration
3.4.5.3 SIO Configuration: Serial Port 3 Configuration Options summary: Use This Device Disabled Enabled Optimal Default, Failsafe Default Enable or Disable this Logical Device. Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=3E8; IRQ=11; IO=2E8; IRQ=11; Allows the user to change the device resource settings. New settings will be reflected on this setup page after system restarts. -
Page 51: Power Management
3.4.6 Power Management Options summary: Power Mode ATX Type Optimal Default, Failsafe Default AT Type Select system power mode. Restore AC Power Loss Last State Optimal Default, Failsafe Default Power On Power Loss RTC wake system from S5 Disabled Optimal Default, Failsafe Default Fixed Time Dynamic Time Enable or disable System wake on alarm event. -
Page 52: Setup Submenu: Chipset
Setup submenu: Chipset Chapter 3 – AMI BIOS Setup... -
Page 53: Chipset: North Bridge
3.5.1 Chipset: North Bridge Options summary: DCMT Total Gfx 128M Optimal Default, Failsafe Default 256M Select DVMT5.0 Total Graphics Memory size used by the Internal Graphics Device Chapter 3 – AMI BIOS Setup... -
Page 54: Chipset: South Bridge
3.5.2 Chipset: South Bridge Options summary: HD-Audio Support Disable Optimal Default, Failsafe Default Enable Enable/Disable HD-Audio Support Mini-Card 1 Speed Auto Optimal Default, Failsafe Default Gen 1 Gen 2 Configure PCIe Speed Mini-Card 2 Speed Auto Optimal Default, Failsafe Default Gen 1 Gen 2 Configure PCIe Speed... -
Page 55: Setup Submenu: Security
Setup submenu: Security Change User/Administrator Password You can set a User Password once an Administrator Password is set. The password will be required during boot up, or when the user enters the Setup utility. Please Note that a User Password does not provide access to many of the features in the Setup utility. Select the password you wish to set, press Enter to open a dialog box to enter your password (you can enter no more than six letters or numbers). -
Page 56: Setup Submenu: Boot
Setup submenu: Boot Options summary: Quiet Boot Disabled Enabled Optimal Default, Failsafe Default Enable or Disable Quiet Boot option Network Stack Disabled Optimal Default, Failsafe Default Enabled Enable/Disable UEFI Network Stack Chapter 3 – AMI BIOS Setup... -
Page 57: Setup Submenu: Save & Exit
Setup submenu: Save & Exit Chapter 3 – AMI BIOS Setup... -
Page 58: Chapter 4 - Drivers Installation
Chapter 4 Chapter 4 – Drivers Installation... -
Page 59: Product Cd/Dvd
Product CD/DVD The BOXER-6710 comes with a product DVD that contains all the drivers and utilities you need to setup your product. Insert the DVD and follow the steps in the autorun program to install the drivers. In case the program does not start, follow the sequence below to install the drivers. Step 1 –... - Page 60 Step 4 – Install LAN Drivers Open the STEP4–LAN folder and select your OS Open the tar.gz or .exe file Follow the instructions Drivers will be installed automatically Step 5 – Install Audio Drivers Open the STEP5–Audio folder and select your OS Open the .exe file Follow the instructions Drivers will be installed automatically...
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Page 61: Appendix A - Watchdog Timer Programming
Appendix A Appendix A - Watchdog Timer Programming... -
Page 62: Watchdog Timer Initial Program
Watchdog Timer Initial Program Table 1 : SuperIO relative register table Default Value Note SIO MB PnP Mode Index Register Index 0x2E(Note1) 0x2E or 0x4E SIO MB PnP Mode Data Register Data 0x2F(Note2) 0x2F or 0x4F Table 2 : Watchdog relative register table Register BitNum Value... -
Page 63: Watchdog Sample Program
A.2 Watchdog Sample Program ************************************************************************************ // SuperIO relative definition (Please reference to Table 1) #define byte SIOIndex //This parameter is represented from Note1 #define byte SIOData //This parameter is represented from Note2 #define void IOWriteByte(byte IOPort, byte Value); #define byte IOReadByte(byte IOPort); // Watch Dog relative definition (Please reference to Table 2) #define byte TimerLDN //This parameter is represented from Note3 #define byte TimerReg //This parameter is represented from Note4... - Page 64 ************************************************************************************ VOID Main(){ // Procedure : AaeonWDTConfig // (byte)Timer : Time of WDT timer.(0x00~0xFF) // (boolean)Unit : Select time unit(0: second, 1: minute). AaeonWDTConfig(); // Procedure : AaeonWDTEnable // This procudure will enable the WDT counting. AaeonWDTEnable(); ************************************************************************************ Appendix A – Watchdog Timer Programming...
- Page 65 ************************************************************************************ // Procedure : AaeonWDTEnable VOID AaeonWDTEnable (){ WDTEnableDisable(EnableLDN, EnableReg, EnableBit, 1); // Procedure : AaeonWDTConfig VOID AaeonWDTConfig (){ // Disable WDT counting WDTEnableDisable(EnableLDN, EnableReg, EnableBit, 0); // Clear Watchdog Timeout Status WDTClearTimeoutStatus(); // WDT relative parameter setting WDTParameterSetting(); VOID WDTEnableDisable(byte LDN, byte Register, byte BitNum, byte Value){ SIOBitSet(LDN, Register, BitNum, Value);...
- Page 66 ************************************************************************************ VOID SIOEnterMBPnPMode(){ IOWriteByte(SIOIndex, 0x87); IOWriteByte(SIOIndex, 0x87); VOID SIOExitMBPnPMode(){ IOWriteByte(SIOIndex, 0xAA); VOID SIOSelectLDN(byte LDN){ IOWriteByte(SIOIndex, 0x07); // SIO LDN Register Offset = 0x07 IOWriteByte(SIOData, LDN); VOID SIOBitSet(byte LDN, byte Register, byte BitNum, byte Value){ Byte TmpValue; SIOEnterMBPnPMode(); SIOSelectLDN(byte LDN); IOWriteByte(SIOIndex, Register); TmpValue = IOReadByte(SIOData);...
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Page 67: Appendix B - I/O Information
Appendix B Appendix B - I/O Information... -
Page 68: I/O Address Map
I/O Address Map Appendix B – I/O Information... - Page 69 Appendix B – I/O Information...
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Page 70: Memory Address Map
Memory Address Map Appendix B – I/O Information... - Page 71 IRQ Mapping Chart Appendix B – I/O Information...