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Summary of Contents for Asus AAEON BOXER-6450-TGU
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BOXER-6450-TGU Fanless Embedded Box PC User ’s Manual 1 Last Updated: October 12, 2021...
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Copyright Notice This document is copyrighted, 2021. All rights are reserved. The original manufacturer reserves the right to make improvements to the products described in this manual at any time without notice. No part of this manual may be reproduced, copied, translated, or transmitted in any form or by any means without the prior written permission of the original manufacturer.
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Acknowledgements All other product name or trademarks are properties of their respective owners. Microsoft Windows® is a registered trademark of Microsoft Corp. ⚫ Intel® and Celeron® are registered trademarks of Intel Corporation ⚫ Intel Core™ is a trademark of Intel Corporation ⚫...
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Packing List Before setting up your product, please make sure the following items have been shipped: I t em Quantity BOXER-6450-TGU ⚫ Wall-mount bracket ⚫ Screw Package ⚫ If any of these items are missing or damaged, please contact your distributor or sales representative immediately.
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About this Document This User’s Manual contains all the essential information, such as detailed descriptions and explanations on the product’s hardware and software features (if any), its specifications, dimensions, jumper/connector settings/definitions, and driver installation instructions (if any), to facilitate users in setting up their product. Users may refer to the product page at AAEON.com for the latest version of this document.
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Saf e ty Precautions Please read the following safety instructions carefully. It is advised that you keep this manual for future references All cautions and warnings on the device should be noted. Make sure the power source matches the power rating of the device. Position the power cord so that people cannot step on it.
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If any of the following situatio ns arises, please the contact our service personnel: Damaged power cord or plug Liquid intrusion to the device iii. Exposure to moisture Device is not working as expected or in a manner as described in this manual The device is dropped or damaged Any obvious signs of damage displayed on the device...
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FCC Statement This device complies with Part 15 FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received including interference that may cause undesired operation. C aution: There is a danger of explosion if the battery is incorrectly replaced.
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Chi na RoHS Requirement (EN) Hazardous and Toxic Materials List AAEON System QO4-381 Rev.A0 Hazardous or Toxic Materials or Elements Component Name PCB and Components Wires & Connectors for Ext.Connections Chassis CPU & RAM HDD Drive LCD Module Optical Drive Touch Control Module Battery...
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Hardware Installation .................. 29 2.5.1 2.5” SATA Drive Installation ............29 2.5.2 Mini Card Module I nstallation ............31 2.5.3 Wall Mount Installation ..............32 Chapter 3 - AMI BIOS Setup ..............33 System Test and Initialization ..............
1 .1 Spe cifications System Intel® Core™ i7-1185G7E, 1.80 GHz CP U Intel® Core™ i5-1145G7E, 1.50 GHz Intel® Core™ i3-1115G4E, 2.20 GHz Intel® Celeron® 6305E Processor, 1.80 GHz Intel® SoC Chip set LPDDR4x max 3200 MHz on-board memory, Sys tem Memory up to 32GB HDMI 2.0b x 1, 4Kx2K 60Hz Dis play Interface...
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Me chanical Mo unting Wall-mount Dimensions (W x H x D) 6.54” x 4.65” x 2.2” (166mm x 118mm x 56mm) Gross Weight 3.3 lbs. (1.5 kg) N et Weight 2.20 lbs. (1 kg) E nvironmental 14°F ~ 131°F (-10°C ~ 55°C), IEC68-2 with 0.5 Op erating Temperature m/s airflow (Turbo Boost off) -40°F ~ 176°F (-40°C ~ 80°C)
2.3 Li st of Jumpers Please refer to the table below for all of the system’s jumpers that you can configure for your application. Lab el F unction JP 1 Clear CMOS Jumper, Auto Power Button Selection 2.3.1 Cl e ar CMOS Jumper Auto Power Button Selection ( JP1) Clear CMOS Jumper Normal (Default) Clear CMOS...
2.4 Li st of Connectors Please refer to the table below for all of the system’s connectors that you can co nfigure for your application Lab el F unction CN 2 HDMI Connector CN 3 eDP Connector CN 4 Mini Card Slot (Full Size) CN 5 SATA Connector CN 8...
P in Sig nal Level Sig nal Sig nal Type +VCC_EDP_BKLT +12V (Default)/ +5V +VCC_EDP_BKLT +12V (Default)/ +5V +VCC_EDP_BKLT +12V (Default)/ +5V +VCC_EDP_BKLT +12V (Default)/ +5V 2.4.3 Mi ni Card Slot ( Full-Size) ( CN4) P in Sig nal Level Sig nal Sig nal Type PCIE_WAKE#...
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P in Sig nal Level Sig nal Sig nal Type W_DISABLE# +3.3V PCIE_RST# +3.3V PCIE_RX- DIFF +3.3VSB +3.3V PCIE_RX+ DIFF +1.5V +1.5V SMB_CLK +3.3V PCIE_TX- DIFF SMB_DATA +3.3V PCIE_TX+ DIFF USB_D- DIFF USB_D+ DIFF +3.3VSB +3.3V +3.3VSB +3.3V Chapter 2 – Hardware Information...
P in Sig nal Level Sig nal Sig nal Type +1.5V +1.5V +3.3VSB +3.3V 2.4.4 SATA Port (CN5) P in P in Name Sig nal Type Sig nal Level SATA_TX+ DIFF SATA_TX- DIFF SATA_RX- DIFF SATA_RX+ DIFF Chapter 2 – Hardware Information...
2.4.5 M.2 2280 M -Key Slot ( CN8) P in P in Name Sig nal Type Sig nal Level +3.3V +3.3V +3.3V +3.3V PCIE3_RX- DIFF PCIE3_RX+ DIFF SATA_LED +3.3V PCIE3_TX- +3.3V +3.3V PCIE3_TX+ +3.3V +3.3V +3.3V +3.3V PCIE2_RX- DIFF +3.3V +3.3V PCIE2_RX+ DIFF...
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P in P in Name Sig nal Type Sig nal Level PCIE2_TX+ DIFF PCIE1_RX- DIFF PCIE1_RX+ DIFF PCIE1_TX- DIFF PCIE1_TX+ DIFF DECSLP PCIE0_RX- DIFF PCIE0_RX+ DIFF PCIE0_TX- DIFF PCIE0_TX+ DIFF PERST# Chapter 2 – Hardware Information...
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P in P in Name Sig nal Type Sig nal Level PCIE_CLK_REQ# PCIE_CLK- DIFF PCIE_WAKE PCIE_CLK+ DIFF +3.3V +3.3V +3.3V +3.3V +3.3V +3.3V Chapter 2 – Hardware Information...
2.4.6 Dual L AN (RJ-45) Intel i 225 ( Port A)/ Intel i219 (Port B) (CN9) Po rt A (i225) Po rt B (i219) P in P in Name P in P in Name 1P 1 LAN2_MDIO_P 2P 1 LAN1_MDIO_P 1P 2 LAN2_MDIO_N 2P 2...
2.4.7 Dual USB3.2 G en 2 Ports ( Port 1/ Port 2) (CN10) P in P in Name Sig nal Type Sig nal Level +5VSB USB0_D- DIFF USB0_D+ DIFF USB0_SSRX- DIFF USB0_SSRX+ DIFF USB0_SSTX- DIFF USB0_SSTX+ DIFF +5VSB USB1_D- DIFF USB1_D+ DIFF USB1_SSRX-...
2.4.8 SPI Fl ash Programing Port ( CN15) P in P in Name Sig nal Type Sig nal Level SPI_MISO SPI_CLK +3.3VSB +3.3V SPI_MOSI SPI_CS Chapter 2 – Hardware Information...
2.4.9 FAN Connector (CN16) P in P in Name Sig nal Type Sig nal Level +V12S +12V TACH 2.4.10 e SPI Debug Port (CN17) P in P in Name Sig nal Type Sig nal Level LAD0 +3.3V LAD1 +3.3V LAD2 +3.3V LAD3 +3.3V...
P in P in Name Sig nal Type Sig nal Level LFRAME# LRESET# +3.3V LCLK SMB_DATA/ I2C_SDA SMB_CLK/ I2C_CLK SMB_ALERT/ SERIRQ +3.3V 2.4.11 E xternal Power Input ( CN18) P in P in Name Sig nal Type Sig nal Level +VIN +12V Chapter 2 –...
2.4.12 DIO 4-Bit DB-9 E xternal Connector ( DIO) P in Sig nal Sig nal Type Sig nal Level DIO_0 DIO_1 DIO_2 DIO_3 N o te: DIO Connector connects to CN23 Header. Refer to PICO-TGU4 User Manual for Header Pin Definitions. Chapter 2 –...
2.4.15 Front Panel ( CN26) P in P in Name P in P in Name PWR_BTN- PWR_BTN+ HDD_LED- HDD_LED+ BUZZER- BUZZER+ PWR_LED- PWR_LED+ H/W RESET- H/W RESET+ 2.4.16 5V SATA Power Connector (CN29) P in P in Name Sig nal Type Sig nal Level Chapter 2 –...
2.4.17 RTC Battery Connector ( CN30) P in P in Name Sig nal Type Sig nal Level 2.4.18 DIO 4-bit Port ( CN31) P in P in Name Sig nal Type Sig nal Level DIO_4 DIO_5 DIO_6 DIO_7 Chapter 2 – Hardware Information...
2.5 Hardware Installation 2.5.1 2.5” SATA Drive Installation Before installing the SATA Drive, ensure the system is powered down and disconnect the power cord from the system. Make sure you have the SATA Drive ready to install. See Chapter 1 for SATA drive specifications for compatibility. St ep 1: Remove the six screws securing the bottom panel of the system, then remove the bottom panel.
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St ep 3: Attach the assembly to the bottom panel as shown, using four mounting screws. Notch Connectors St ep 4: Attach the SATA Cable and SATA Power Cable to the connectors on the board. St ep 5: Reattach the bottom panel and secure with the six screws removed in Step 1. Chapter 2 –...
2.5.2 Mi ni Card Module Installation Before installing your expansion module (Mini Card/M.2), ensure the system is powered down and disconnect the power cord from the system. Make sure you have the expansion module ready to install. See Chapter 1 for expansion module specifications for compatibility.
2.5.3 Wal l Mount Installation Attach the wall-mount brackets to the bottom of the system as shown. The extended part of the bracket should come away from the system. Chapter 2 – Hardware Information...
System Test and Initialization The BOXER-6450-TGU uses certain routines to perform testing and initialization during the boot up sequence. If an error, fatal or non-fatal, is encountered, the system will output a few short beeps or display an error message. The board can usually continue the boot up sequence with non-fatal errors.
3.2 AMI BIOS Setup The AMI BIOS ROM has a pre-installed Setup program that allows users to modify basic system configurations. These configurations are stored in the battery-backed CMOS RAM and BIOS NVRAM so the information is retained when power is turned off. To enter BIOS Setup, turn on the system and immediately press <Del>...
3.4.1 CPU Configuration Op tions Summary I nt el (VMX) Disabled Vir tualization Enabled Optimal Default, Failsafe Default Technology When enabled, a VMM can utilize the additional hardware capabilities provided by Vanderpool Technology. I nt el(R) SpeedStep(tm) Disabled Enabled Optimal Default, Failsafe Default Allows more than two frequency ranges to be supported.
3.4.4.1 Fi rmware Update Configuration Op tions Summary Me F W Image Re-Flash Disabled Optimal Default, Failsafe Default Enabled Enable/Disable Me FW Image Re-Flash function. F W Update Disabled Enabled Optimal Default, Failsafe Default Enable/Disable ME FW Update function. Chapter 3 – AMI BIOS Setup...
3.4.6 Powe r Management Op tions Summary Po wer Mode ATX Type Optimal Default, Failsafe Default AT Type Select system power mode Po wer Saving(ERP) Enabled Co ntrol Disabled Optimal Default, Failsafe Default Configure power mode for power saving function. R estore AC Power Loss Last State Optimal Default, Failsafe Default...
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Op tions Summary Fixed Time: System will wake on the hr::min::sec specified. Dynamic Time: System will wake on the current time + Increase minute(s). Bypass: BIOS will not control RTC wake function during system shutdown Chapter 3 – AMI BIOS Setup...
3.4.7 AAE ON BIOS Robot Op tions Summary Sends watch dog before Disabled Optimal Default, Failsafe Default B I OS POST Enabled Enabled - Robot set Watch Dog Timer (WDT) right after power on, before BIOS start POST process. And then Robot will clear WDT on compeletion of POST.
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Op tions Summary Enabled - Robot set Watch Dog Timer (WDT) after POST completion, before BIOS transfer control to OS. WARNING: Before enabling this function, a program in OS must be in responsible for clearing WDT. Also, this function should be disabled if OS is going to update itself.
3.4.7.1 De vice Detecting Configuration Op tions Summary A ction Reset System Optimal Default, Failsafe Default Hold System Select action that robot should do. So ft or hard reset Soft Optimal Default, Failsafe Default Hard Select reset type robot should send on each boot. R etry-Count Optimal Default, Failsafe Default Fill retry counter here.
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A ction: Hold System Op tions Summary A ction Reset System Optimal Default, Failsafe Default Hold System Select action that robot should do. Ho lding time out Optimal Default, Failsafe Default (s econd) Fill hold time out here. Robot will hold system no longer then time-out value, and then let system continue its POST.
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3.4.7.1.1 De vice #X Detecting Configuration I nt erface: Disabled Op tions Summary I nt erface Disabled Optimal Default, Failsafe Default SMBUS Legacy I/O Super I/O MMIO Select interface robot should use to communicate with device. Chapter 3 – AMI BIOS Setup...
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I nt erface: PCI Op tions Summary B U S Optimal Default, Failsafe Default Fill BUS number to a PCI device, in hexadecimal. Range: 0 - FF Device Optimal Default, Failsafe Default Fill DEVICE number to a PCI device, in hexadecimal. Range: 0 - FF F unction Optimal Default, Failsafe Default Fill FUNCTION number to a PCI device, in hexadecimal.
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Op tions Summary R egister data is bitwise equal to Optimal Default, Failsafe Default bytewise equal to bytewise lesser than bytewise larger than Select how robot should compare data read from register, to a value configured below. R egister offset Optimal Default, Failsafe Default Fill register offset (or index) for robot to read, in hexadecimal.
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I nt erface: DIO Op tions Summary Device Is not Optimal Default, Failsafe Default Select that robot should or should not do action if condition met. DI O pin number DIO1 Optimal Default, Failsafe Default DIO* Fill DIO pin number. 0 - DIO0, 1 - DIO1... and so on. For COM express product: 0-3 - GPI0-3, 4-7 - GPO0-3 Device Is not...
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I nt erface: SMBUS Op tions Summary SMBUS Slave Optimal Default, Failsafe Default A d dress Fill slave address to a SMBUS device, in hexadecimal. Range: 0 - FF Device Is not Optimal Default, Failsafe Default Select that robot should or should not do action if condition met. I n co ndition Present Optimal Default, Failsafe Default...
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Op tions Summary Select how robot should compare data read from register, to a value configured below. R egister offset Optimal Default, Failsafe Default Fill register offset (or index) for robot to read, in hexadecimal. Range: 0 - FF B it offset Optimal Default, Failsafe Default Fill bit offset for register, for robot to compare with bit value.
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I nt erface: Legacy I/O Op tions Summary I /O Address Optimal Default, Failsafe Default Fill I/O address device is responding to. Range: 0~FFFF Device Is not Optimal Default, Failsafe Default Select that robot should or should not do action if condition met. I n co ndition Present Optimal Default, Failsafe Default...
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Op tions Summary B it offset Optimal Default, Failsafe Default Fill bit offset for register, for robot to compare with bit value. B it value Optimal Default, Failsafe Default High Fill bit value for robot to compare register-bit with specified offset. B yt e value Optimal Default, Failsafe Default Fill a byte value for robot to compare register data with, in hexadecimal.
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I nt erface: Super I/O Op tions Summary Sup er I/O LDN Optimal Default, Failsafe Default Fill LDN number to a Super I/O device. Range: 0~FF Device Is not Optimal Default, Failsafe Default Select that robot should or should not do action if condition met. I n co ndition Present Optimal Default, Failsafe Default...
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Op tions Summary R egister offset Optimal Default, Failsafe Default Fill register offset (or index) for robot to read, in hexadecimal. Range: 0 - FF B it offset Optimal Default, Failsafe Default Fill bit offset for register, for robot to compare with bit value. B it value Optimal Default, Failsafe Default High...
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I nt erface: MMIO Op tions Summary MMI O Address Optimal Default, Failsafe Default Fill Memory Mapped I/O address device is responding to. Range: 0~FFFFFFFF Device Is not Optimal Default, Failsafe Default Select that robot should or should not do action if condition met. I n co ndition Present Optimal Default, Failsafe Default...
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Op tions Summary B it offset Optimal Default, Failsafe Default Fill bit offset for register, for robot to compare with bit value. B it value Optimal Default, Failsafe Default High Fill bit value for robot to compare register-bit with specified offset. B yt e value Optimal Default, Failsafe Default Fill a byte value for robot to compare register data with, in hexadecimal.
3.5.1 PCI E xpress Configuration Op tions Summary P CI Express Root Port Enabled Optimal Default, Failsafe Default Disabled Control the PCI Express Root Port. Chapter 3 – AMI BIOS Setup...
3.5.2 Storage Configuration Op tions Summary SATA Controller(s) Disabled Enabled Optimal Default, Failsafe Default Enable/Disable SATA Device. Po rt 1 Disabled Enabled Optimal Default, Failsafe Default Enable or Disable SATA Port Ho t Plug Disabled Optimal Default, Failsafe Default Enabled Designates this port as Hot Pluggable.
3.5.3 HD Audio Subsystem Configuration Settings Op tions Summary HD A udio Disabled Enabled Optimal Default, Failsafe Default Control Detection of the HD-Audio device. Disabled = HDA will be unconditionally disabled Enabled = HDA will be unconditionally enabled Chapter 3 – AMI BIOS Setup...
3.5.4 Di gital IO Port Configuration Op tions Summary DI O Port# Output Input Set DIO as Input or Output Out put Level High Optimal Default, Failsafe Default Set output level when DIO pin is output Chapter 3 – AMI BIOS Setup...
3.5.5.1 Se ri al Port 1 Configuration Op tions Summary U s e This Device Disable Enable Optimal Default, Failsafe Default Enable or Disable this Logical Device. Po ssible: Use Automatic Settings Optimal Default, Failsafe Default IO=3F8h; IRQ=4 IO=2F8h; IRQ=3 Allows user to change Device's Resource settings.
3.5.5.2 Se ri al Port 2 Configuration Op tions Summary U s e This Device Disable Enable Optimal Default, Failsafe Default Enable or Disable this Logical Device. Po ssible: Use Automatic Settings Optimal Default, Failsafe Default IO=2F8h; IRQ=3 IO=3F8h; IRQ=4 Allows user to change Device's Resource settings.
3.5.6 Se ri al Port Console Redirection Op tions Summary Co nsole Redirection Disabled Optimal Default, Failsafe Default Enabled Console Redirection Enable or Disable. Co nsole Redirection Disabled Optimal Default, Failsafe Default Enabled Console Redirection Enable or Disable. Chapter 3 – AMI BIOS Setup...
3.5.6.1 Console Redirection Settings Op tions Summary Terminal Type VT100 VT100+ VT-UTF8 ANSI Optimal Default, Failsafe Default Emulation: ANSI: Extended ASCII char set. VT100: ASCII char set. VT100+: Extends VT100 to support color, function keys, etc. VT-UTF8: Uses UTF8 encoding to map Unicode chars onto 1 or more bytes. B its Per second 9600 19200...
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Op tions Summary Dat a Bits Optimal Default, Failsafe Default Parity None Optimal Default, Failsafe Default Even Mark Space A parity bit can be sent with the data bits to detect some transmission errors. Even: parity bit is 0 if the num of 1's in the data bits is even. Odd: parity bit is 0 if num of 1's in the data bits is odd.
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Op tions Summary P utty KeyPad VT100 Optimal Default, Failsafe Default LINUX XTERMR6 ESCN VT400 Select FunctionKey and KeyPad on Putty. Chapter 3 – AMI BIOS Setup...
3.5.7 PCH-IO Configuration Op tions Summary MiniCard Slot Function SATA PCIe Optimal Default, Failsafe Default Select function enabled for Full size MiniCard Slot (CN6) Chapter 3 – AMI BIOS Setup...
3.6 Se tup Submenu: Security Change User/Administrator Password Y ou can set an Administrator Password or User Password. An Administrator Password must be set before you can set a User Password. The password will be required during boot up, or when the user enters the Setup utility. A User Password does not provide access to many of the features in the Setup utility.
3.6.1 Trusted Computing Op tions Summary Security Device Disable Sup port Enable Optimal Default, Failsafe Default Enables or Disables BIOS support for security device. O.S. will not show Security Device. TCG EFI protocol and INT1A interface will not be available. SHA-1 PCR Bank Disable Enable...
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Op tions Summary P latform Hierarchy Disabled Enabled Optimal Default, Failsafe Default Enable or disable Platform Hierarchy St orage Hierarchy Disabled Enabled Optimal Default, Failsafe Default Enable or Disable Storage Hierarchy End orsement Disabled Hierarchy Enabled Optimal Default, Failsafe Default Enable or Disable Endorsement Hierarchy TP M2.0 UEFI Spec TCG_1_2...
3.6 .2 Se cure Boot Op tions Summary Secure Boot Disabled Optimal Default, Failsafe Default Enabled Secure Boot feature is Active if Secure Boot is Enabled, Platform Key (PK) is enrolled and the System is in User mode. The mode change requires platform reset Secure Boot Mode Custom...
3.6.1.1 Ke y Management Op tions Summary Factory Key Provision Disabled Optimal Default, Failsafe Default Enabled Secure Boot feature is Active if Secure Boot is Enabled, Platform Key (PK) is enrolled and the System is in User mode. The mode change requires platform reset R estore Factory Keys Force System to User Mode.
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Op tions Summary R emove 'UEFI CA' from DB Device Guard ready system must not list 'Microsoft UEFI CA' Certificate in Authorized Signature database (db) R estore DB defaults Restore DB variable to factory defaults P latform Key (PK) Details Export Update Delete...
Dri vers Download and Installation Drivers for the BOXER-6450-TGU can be downloaded from the product page on the AAEON website by following this link: https://www.aaeon.com/en/p/compact-fanless-box-pc-intel-11th-gen-boxer-6450-tgu Download the driver(s) you need and follow the steps below to install them. St ep 1 – Install Chipset Driver Open the St ep 1 - Chipset folder Run the Set upChipset.exe file in the folder Follow the instructions...
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St ep 4 – LAN Open the St ep 4 - LAN folder Run the P R OWinx64.exe file in the folder Follow the instructions Drivers will be installed automatically St ep 5 – Install Serial IO Driver Open the St ep 5 – Peripheral folder Run the Set upSerialIO.exe file in the folder Follow the instructions Drivers will be installed automatically...
Li st of Mating Connectors and Cables The following table lists mating connectors and available cables. Mat ing Connector Co nnector A vailable F unction Cab le P/N Lab el Cab le Vendor Mo del no CN 3 Connector SATA CN 5 TechBest 51021-1000...
Introduction to Watchdog Timer This section details how to set up and program the Watchdog Timer for your AAEON system or board. The watchdog timer is used to automatically detect malfunctions and recover the system. During normal operation, the system will regularly send a signal to reset the watchdog timer.
C.2 Programing the Watchdog Timer with AAEON SDK If you have installed the AAEON Framework, you can program the Watchdog Timer using the AAEON SDK. Simply locate where the SDK is installed, and double click the icon. The following dialog box will appear: Co unt Mode: Set Watchdog Timer to count in minutes or seconds.
C.3 Programing Watchdog Timer with AAEON W indows EAPI AAEON Framework (KMDF Driver) must be installed before calling these functions. EapiLibInitialize() should be the first to call before calling other EAPI functions. EApiLibUnInitialize() should be called to release resources before program exit.
EApiWDogStop must be called before Stage C/F to prevent event from being generated. EApiWDogStop must be called before Stage D/G to prevent system from being reset. C.3.1 Watchdog T imer Functions C.3.1.1 E apiWDogGetCap() Command Line: EApiWDogGetCap(…) __OUTOPT uint32_t *pMaxDelay, __OUTOPT uint32_t *pMaxEventTimeout, __OUTOPT uint32_t *pMaxResetTimeout Use this command to get maximum Supported Delay / Supported Event Timeout /...
C.3.1.2 E apiWDogStart() Command Line: EApiWDogStart( __IN uint32_t Delay, __IN uint32_t Minute, __IN uint32_t EventTimeout, __IN uint32_t ResetTimeout Use this command to start the Watchdog Timer and set the timeout values. To stop the Watchdog Timer, issue the command EApiWDogStop. After issuing EAPiWDogStop, the command EApiWDogStart must be called again with new values to restart.
C.3.1.3 E apiWDogTrigger() Command Line: EapiWDogTrigger() Use this command to trigger the Watchdog Timer. Parameters F unction Parameters None Co ndition R eturn Values Library Uninitialized EAPI_STATUS_NOT_INITIALIZED Watchdog Not Started EAPI_STATUS_ERROR Common Error Common Error Code Others EAPI_STATUS_SUCCESS C.3.1.4 E apiWDogStop() Command Line: EapiWDogStop() Use this command to close the Watchdog Instance.
C.3.1.5 E apiWDogReloadTimer() Command Line: EapiWDogReloadTimer() Use this command to reload the Timeout count Parameters F unction Parameters None Co ndition R eturn Values Library Uninitialized EAPI_STATUS_NOT_INITIALIZED Common Error Common Error Code Others EAPI_STATUS_SUCCESS C.3.1.6 E apiWDogGetStatus() Command Line: EapiWDogGetStatus( __OUTOPT uint32_t *pwdtMinute, __OUTOPT uint32_t *pwdtCountTime, __OUTOPT uint32_t *pwdtReloadTime...
C.3.1.7 E apiWDogSetStatus() Command Line: EApiWDogSetStatus( __IN uint32_t wdtMinute, __IN uint32_t wdtCountTime, __IN uint32_t wdtReloadTime Use this command to set Watchdog Timer mode, time count value and reload timer. Parameters F unction Parameters wdtMinute Set the mode of minute or second wdtCountTime Set WDT time count wdtReloadTime...
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Re m oving Glue f rom Your System To protect components from damage and ensure proper operation out of the box, glue may have been applied to some cables or connectors to keep them in place during shipping. This glue must be removed before attempting to swap components or perform maintenance.
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St ep 1: Using an eyedropper or bottle as shown above, apply a few drops of alcohol to the glue. St ep 2: Allow the alcohol to soak for 10 seconds, then use a cotton swab or cotton with anti-static tweezers to evenly rub the alcohol over the glue. St ep 3: Let soak for 10 more seconds, then use anti-static tweezers to remove the glue.
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If you encounter any issues or need support, please contact your AAEON representative or visit our Support Page at AAEON.com Appendix D – Glue Removal Procedure...